introduction

Radiation this thing, can not be seen and touched, rectification is also calculated by the hour, and if you are not careful, tens of thousands of dollars will be gone. I have to say, EMC rectification is tough. This article mainly shares theory + practical cases, divided into upper and lower articles, the overall length of the article is longer, it is recommended to collect and read.

1. What is the source of EMI?

There are two types of radiation sources that cause EMI problems: alternating electric fields (high resistance) and alternating magnetic fields (low resistance). Non-isolated DC/DC converters have nodes and loops with very low impedance (much lower than the free-space impedance of 377Ω, which is the product of the vacuum permeability µand the speed of light in vacuum C, also known as the intrinsic impedance of free space), so the main source of radiation in Buck architecture DC/DC converters is usually the magnetic field.

Magnetic field radiation is formed by high frequency currents in a small current loop. The high-frequency magnetic field generated by the current loop will gradually convert to an electromagnetic field after leaving the loop about 0.16λ, and the resulting field strength is about:

Where, f is the frequency of the signal, in Hz; A is the area of the current loop, expressed in m²; I is the amplitude of the current in the current ring, expressed in A; R is the distance of the measuring point from the loop, expressed in m.

For example, a 1cm² current loop with a current of 1mA and a current change frequency of 100MHz would have a field strength of 4.4µV/m, or 12.9dBµV, 3m away from the current loop.

The following figure shows the relationship between the radiation intensity formed by a 1cm² current loop flowing 1mA current and the frequency of the current change. The green line in the figure is the radiation intensity threshold at a distance of 3m allowed by the standard.

As can be seen from the figure, the radiation formed by a 1mA current in a 1cm² loop is not easy to exceed the specification limit. In reality, the cause of excessive radiation is often that the loop that should be minimized becomes a large loop, or that the wire attached to the line forms excess radiation. The antenna effect formed by these large loops or wires will play a major role in the total radiation.

2. Current loop of BUCK circuit

There are two main circuits in Buck architecture DC/DC converters where the current changes dramatically:

When the on-bridge MOSFET Q1 is switched on, the current flows out of the power supply, enters the output capacitor and load after Q1 and L1, and then returns to the power input through the ground wire. During this process, the alternating current in the current flows through the input capacitor and the output capacitor. The current path in question is shown by the red line in Figure 2, which is labeled I1.

When Q1 is cut off, the inductive current will continue to flow in the original direction, and the synchronous rectifier switch MOSFET Q2 will be switched on at this time, then the electricity flows through Q2, L1, output capacitor flow and return to Q2 through the ground line, its loop is shown in the blue line in Figure 2, it is marked as I2.

Current I1 and I2 are discontinuous, which means that there are steep rising and falling edges when they switch, and these steep rising and falling edges have very short rising and falling times, so there is a high current change rate dI/dt, in which there must be a lot of high-frequency components.

In the loop described above, the current loop I1 and I2 share a path from the switching node → inductance → output capacitance → ground →Q2's source. When combined, I1 and I2 form a relatively smooth, continuous zigzag waveform, which contains less high-frequency components because it does not have an edge with a very high current change rate dI/dt.

From the point of view of electromagnetic radiation, the shaded A1 region in Figure 3 is the part of the loop with a high current rate of change dI/dt, which will generate the most high-frequency components and is therefore the most critical part to be considered in the EMI design of Buck converters. In the figure, the current change rate dI/dt in the A2 region is not as high as that in the A1 region, so the generated high-frequency noise is less.

When designing the PCB layout of Buck converters, the area of the A1 area should be designed to be as small as possible. For this, you can refer to the PCB layout design practical points in Chapter 7.

3. Input and output filtering processing

Under ideal conditions, both the input and output capacitors have extremely low impedance to the switching current of the Buck converter. In reality, however, both ESR and ESL exist in capacitors, which both increase the impedance of the capacitor and cause additional high frequency voltage drops above it. This voltage drop will create a corresponding current change on the power supply line and the load connection circuit, as shown in the figure below.

Due to the discontinuous nature of the input current of Buck converters and the fact that the actual power lines for the converters are usually very long, the radiation caused by the input loop A3 can also be significant and can result in out-of-specification conducted radiation (in the 150kHz to 30MHz band) that cannot pass electromagnetic compatibility (EMC) conduction tests.

In order to reduce the voltage drop caused by the input capacitor CIN, a variety of low-ESR MLCC capacitors of different sizes can be placed near the Buck IC, for example, a 2x10µF capacitor in the 1206 package and a 22nF to 100nF capacitor in the 0603 or 0402 package can be combined. In order to reduce the noise of the input loop, it is highly recommended to add additional LC filters on the input line. When pure inductors are used as L2, it is necessary to add electrolytic capacitor C3 to suppress the possible ringing signal at the power input and ensure the stability of the input power.

In order to filter the output, a variety of MLCC capacitors of different sizes are also used as the output capacitor Cout. The 22nF to 100nF capacitors of the small size 0603 or 0402 prevent the high-frequency noise from the switching node from coupling to the output via the parasitic capacitance of the inductor L1. The addition of additional high-frequency magnetic beads prevents the output loop from becoming an effective loop antenna, but it should be noted that this method may degrade the load transient response characteristics and load adjustment characteristics of the converter. If the load in the application has strict requirements in this regard, then do not use magnetic beads, you can directly put the converter as close to the load as possible, and minimize the area of the loop by optimizing the layout of the copper foil.

4. Reduce the switching speed of the converter

If the optimization of the PCB layout and filter design still cannot make the radiation level of a Buck converter circuit lower than the required level, it can only be found in reducing the switching speed of the converter, which is very helpful to reduce its radiation level.

To understand how much improvement this can lead to, we need to explore the high-frequency components of the discontinuous current pulses. The left side of Figure 6 shows a simplified trapezoidal current waveform, whose period is TPERIOD, pulse width is TW, and pulse rise/fall time is TRISE. Viewed from the frequency domain, this signal contains fundamental frequency components and many higher-order harmonic components. Fourier analysis can be used to know the relationship between the amplitude of these high-frequency components and the pulse width, rise/fall time, which is shown in the right side of the figure below.

The frequency values in the figure above are based on a switching signal with a frequency of 800kHz with a pulse width of 320ns and a rise/fall time of 10ns.

EMI radiation problems often occur in the 50MHz~300MHz band. By increasing the rise and fall time, the fR position can be moved in the low frequency direction, and the strength of the higher frequency signal will be rapidly reduced at a rate of 40dB/dec, thereby improving its radiation status. At low frequency bands, the improvement caused by lower rates of rise and fall is limited.

Add a series resistance to the bootstrap circuit

The rise time of the switching waveform depends on the on-on speed of the on-bridge MOSFET Q1. Q1 is driven by a floating drive powered by a bootstrap capacitor Cboot. In an integrated Buck converter, the Cboot is powered by an internal voltage regulator, which is usually 4V to 5V. See picture on the left.

By reducing the on-off speed of the up-bridge MOSFET switch, the rise time of the Buck converter switch waveform and current pulse is increased, which is achieved by adding a series resistor Rboot to the Cboot, as shown in the figure above. The Rboot value is dependent on the size of the upper bridge MOSFET, and for most applications, 5 to 10Ω is sufficient. For smaller MOSFETs, which have a higher Rdson, a larger Rboot value is permissible. In applications with high duty cycle, too large a Rboot value may result in undercharging of the Cboot and may even lead to instability of the current detection circuit. In addition, the lower MOSFET on-off speed will also increase the switching loss, resulting in a decrease in efficiency.

In the external design of the MOSFET, the resistance can be connected to the gate of the on-bridge MOSFET in series, which can increase the on-bridge time and the cutoff time at the same time.

When the on-bridge MOSFET Q1 is turned off, the inductive current will charge the parasitic output capacitance of Q1 and discharge the parasitic output capacitance of Q2 until the switching node potential becomes lower than the ground potential and the body diode of Q2 is switched on. Therefore, the drop time is basically determined by the peak inductance current and the total parasitic capacitance on the switching node.

The following figure shows the parasitic elements in a Buck converter IC of a conventional design.

These parasitic capacitors are composed of Coss of the MOSFET and capacitors relative to the base, and there are also parasitic inductors present in the connection line from the IC pin to the wafer core. The parasitic inductors caused by these parasitic components and PCB layout, together with the ESL on the input filter capacitor, will cause high frequency ringing signals on the switching waveform. When MOSFET Q1 is switched on, the ringing signal of the rising edge of the switch node signal is mainly caused by the total parasitic inductance (LpVIN + LpGND+ LpLAYOUT + ESLCIN) on the switching path of Coss and MOFET in Q2. When MOFET Q1 is off, the ringing signal of the falling edge of the switch node signal is mainly caused by the Coss of Q1 and the parasitic inductance (LpGND) between the lower bridge MOSFET source and ground.

The figure above shows a switch node waveform with a fast rising time and falling time, with ringing signals on both rising and falling edges. Since the energy storage in the parasitic inductor is equal to ½∙I2∙Lp, the amplitude of the ringing signal will increase as the load current increases. The frequency range of this signal is usually between 200 and 400MHz, which can result in high-frequency EMI radiation. An excessive ringing signal usually means a large parasitic inductance, indicating that the PCB layout design needs to be checked and corrected in order to correct problems with large loops or narrow VIN and/or ground lines. The package of the component also affects the ringing condition, and the wire package will have a larger parasitic inductance than the wafer flip package, because the inductance of the bond wire will be greater than the inductance of the solder joint, and its performance will be worse.

RC buffer suppression circuit

The addition of RC buffer circuit can effectively suppress the ringing phenomenon and increase the switching loss at the same time.

The RC buffer circuit should be placed close to the switch node and power location. In Buck converters using external MOSFET switches, the RC buffer circuit should be placed directly across the drain and source of the underbridge MOSFET. The following diagram demonstrates the placement of the RC buffer circuit.

The function of the buffer resistance Rs is to exert sufficient inhibition capacity on the oscillation process of the parasitic LC oscillator circuit, and its value depends on the intended inhibition strength and the parameters of the L and C parasitic components, which can be determined by the following formula:

ξ is the inhibitory factor. In general, ξ ranges from 0.5 (mild suppression) to 1 (severe suppression). The values of the parasitic parameters Lp and Cp are usually unknown, but can be measured by:

1. The frequency fRING of the original ringing signal is measured at the rising edge of the signal.

2. A small capacitor is added between the switching node and the ground, which reduces the frequency of the ringing signal. Continue increasing the capacitance until the frequency of the ringing signal is reduced to 50% of the original ringing frequency.

3. The reduction to 50% of the ringing signal frequency means that the total resonant capacitance is 4 times the original capacitance. Therefore, the value of the original capacitance Cp is 1/3 of the new capacity.

4. In this way, the value of the parasitic inductance Lp can be obtained:

The series capacitor Cs in the RC buffer circuit needs to be large enough so that the suppression resistance can exhibit a stable resonance suppression effect during the circuit resonance. If the value of this capacitor is too large, its charging and discharging process in each switching cycle will lead to excessive power consumption. Therefore, the value of Cs is usually 3-4 times the value of the parasitic capacitance of the circuit.

In addition to suppressing the resonance, the RC smooth suppression circuit can also slightly reduce the speed at which the switching waveform rises and falls. In addition, the process of charging and discharging the smooth suppression capacitor also causes additional switching current spikes during switching state changes, which can cause new EMI problems in low frequency regions.

When an RC smooth suppression circuit is used, be sure to check the total power loss of the circuit. The efficiency of the converter is bound to decline, especially when the switching frequency is very high and the input voltage is very high.

RL buffer suppression circuit

One method that is not easy to think of to suppress the switching loop ringing signal is to add a series of RL buffer suppression circuit on the resonant circuit, which is shown in the figure below. The purpose of adding this circuit is to introduce a small amount of series impedance into the resonant circuit, but enough to provide partial suppression. Based on the fact that the total impedance of the switching circuit is always low, the suppression resistor Rs can be used very small, on the order of 1Ω or less. The inductor Ls is selected based on its ability to provide a very low impedance at a frequency band lower than the resonant frequency, in effect providing a short circuit to the suppression resistance at a low frequency band. Since the frequency of the ringing signal is usually always very high, the inductance required can be very small, probably on the order of a few nH, and can even be replaced by a few mm long PCB copper foil path, which does not lead to a significant increase in the loop area. It is also possible to replace this inductor with a very small magnetic bead, so that it is connected to Rs in parallel. When doing so, the bead should have a very low impedance at low frequencies below the resonant frequency, while also having sufficient current load capacity to be able to carry the effective current at the input.

The RL buffer suppression circuit is ideally placed on the input node immediately adjacent to the power level. One drawback of the RL suppression circuit is that it introduces an impedance to the switching circuit in the high frequency region. When the switching state changes rapidly, the current pulse in the switching will create a temporary voltage burr on the resistance Rs, and thus a small burr on the input node of the power stage. If the input voltage burrs make the voltage too high or too low, the switching of the power level or the operation of the IC will be affected. Therefore, when the RL buffer suppression circuit is added, the voltage burr on the input node must be checked under the maximum load state to avoid the possible problems caused by this.

Continue to the next "Efficient Buck Converter EMI suppression: Case Analysis and Practical skills";...